This project is a partnership between Michigan Technical University and the College of Lake County to develop course materials and curricula for two-year and four-year technology programs in logic design and hardware modeling using VHDL and FPGAs. The curriculum is being designed to enable these programs to better meet the technician needs of industry and re-configurable computing labs are being established at each institution to support the curriculum. The labs are also being used as part of a collaborative undergraduate research program between the two institutions. To further support the curriculum, principal investigators from both Michigan Technical University and the College of Lake County are co-leading faculty development workshops covering both content and pedagogical knowledge. The materials developed by the project are being disseminated without charge through a project website while the results on student learning and professional development are being disseminated through conference and journal publications. The project includes rigorous formative and summative evaluation plans with both qualitative and quantitative components coordinated by an independent evaluator. The project includes an outreach effort to high school students from underrepresented groups.
This grant enabled revision of the digital logic design curriculum taught in the electrical engineering technology programs at Michigan Technological University (Michigan) and the College of Lake County (Illinois). Instead of teaching topics and skills that quickly become out-of-date and less important to employers, curriculum revisions now match current industry needs for skills in a Hardware Description Language (HDL) and Field Programmable Gate Array (FPGA) design. The new curriculum provides students with a hands-on educational experience that is well-respected and desired by industry. The grant was also utilized to establish two Re-Configurable Computing Labs (one at each partner institution) to demonstrate the value of state-of-the-art, hands-on training experiences and to support the course changes. As a result of this project, both institutions developed faculty expertise in teaching Very High Speed Integrated Circuit Hardware Description Language (VHDL) FPGA design. An integral part of the dissemination plan of this project was to offer two 2-day training workshops for up to 10 faculty members. The workshops were designed for electrical engineering technology program faculty with the goal of combining technical information from vendors with practical curriculum planning and strategies for developing courses like those developed at Michigan Technological University under this project. The workshops were advertised widely, primarily using Engineering Technology Division (ETD) listservs. There was an overwhelmingly positive response to the opportunity announced on the ETD listserv, which forced the PI to close registration after only two hours each time a workshop was announced. Due to the response to the workshop opportunities, the PI adjusted project resources to offer three workshops instead of the planned two. Instead of training only 20 faculty members in two workshops, the project managed to train 35 faculty in three workshops.
