The design of highly accurate analog circuits becomes increasingly difficult in deep submicron technology. In particular, errors due to high-order nonlinearities are the limiting factors in achieving high resolution analog-to-digital convertors (ADCs). Conventional methods of estimating nonlinear terms needs higher order statistics of the output signal and involve complicated signalprocessing techniques that can overshadow the benefits of digital calibration. The objective of this research is to use innovative digital calibration techniques for compensation of noise and harmonics with minimal overhead in the analog design. The research includes design, fabrication and proof-of-concept of the novel calibration techniques incorporated in a Nyquist-rate ADC.

Intellectual merit: This research will lead to breakthroughs in the design of analog circuits in deep submicron technologies where traditional circuit design techniques are unable to achieve the required performance. The proposed techniques will also result in significant reduction in power consumption and increased efficiency. Although the calibration techniques will be demonstrated in a Nyquist-rate ADC, they are generic in nature and can be used in any analog block with minimal modifications.

Broader Impact: This research has promising applications in multi-standard wireless systems and bio-implantable systems used for diagnosis and prognosis purposes. The outcome of this research will be used in a new graduate course focusing on application of advanced digital-signal processing techniques in enhancing performance of analog circuits. The interdisciplinary nature of the project which combines the knowledge of analog circuit design, digital VLSI design and digital signal processing will provide excellent opportunities for several senior design projects for undergraduate students.

Project Report

Advancement in modern CMOS technology was beneficial to digital VLSI design where area and power scale down with technology. Analog design, on the other hand, faces serious challenges as a result of smaller voltage headroom, smaller intrinsic gain of transistors and excessive leakage currents. These challenges request for different approaches in designing analog and mixed-signal circuits. Conventional methods and circuit topologies would not be able to meet the specifications anymore. This project investigates novel approaches of using digital signal processing techniques to aid the analog circuit in processing the information (data). ADCs (Analog-to-digital) converters are used as platform to implement these ideas since ADCs are inevitable parts of almost any microelectronic circuits and interface the analog world with the digital signal processing where data can be more efficiently processed. 2 Ph.D. students and 2 M.S. student were using this award to complete their research on different varieties of ADCs used for braod range of applications. Digital calibration for a cascaded continuous-time Sigma-Delta ADC were developed by a M.S. student which presents a solution to noise leakage problem of this type of ADCs. A novel triple-sampling Cyclic ADC were developed by a Ph.D. student that presents that expands the speed-resolution space of conventional ADCs using a novel sampling technique. The outcome of this research was also used in two graduate level courses on design of data converters.

Project Start
Project End
Budget Start
2008-07-01
Budget End
2012-06-30
Support Year
Fiscal Year
2008
Total Cost
$265,784
Indirect Cost
Name
Arizona State University
Department
Type
DUNS #
City
Tempe
State
AZ
Country
United States
Zip Code
85281