The objective of this research is experimental evaluation of side-gated small scale field effect transistors for extremely low leakage currents and electrostatic tuning, and electronic transport studies at nanometer scale using these devices. The approach is based on accumulation of holes driven from the substrate for electrostatic control of the channel potential and side interfaces, while an inversion layer is formed at the top-gate interface for current flow. This approach also enables additional functionality through multi-input operation. Electronic transport in ultra-small scale and quasi-1D structures will be studied. High resolution capacitance-voltage characterization will be performed utilizing non-linear characteristics of field effect transistors and ambient noise.
Intellectual merit: Knowledge gained through this project will contribute to the understanding of electronic transport in small scale devices and restricted geometries which may lead to new device concepts for logic and memory. Very narrow devices with the possibility of side charge trapping for further confinement will enable basic studies of transport in electrostatically formed nanowires and quantum dots.
Broader impact: This research will focus on a promising alternative structure to conventional transistors for certain applications. One graduate student will be supported through the project. Undergraduate students will also be involved in the electrical characterization of the devices. The results will be made available through publications and conference presentations. The project will be integrated in ongoing outreach programs in the School of Engineering for K-12 students and teachers to promote math and science education.
We have developed a low-power silicon field effect transistor as the main component of this research project. This project involved process development for a nano-scale electronic device, its electrical characterization and computational analysis. As a result of this project, we have demonstrated that it is possible to make a small-scale device that can work with very low leakage currents. This approach can lead to significant increases in battery life-time for mobile devices and over-all reduced energy consumption for computation. Students involved with this project have performed studies in electronic transport at small-scales and new device architectures. In the course of the project, we have published a number of research articles, made conference presentations and trained graduate and undergraduate students. Some of the findings have lead to a patent application for new micro-/nano-scale oscillators. The nanoscale transistors fabricated during this project will be used for further studies on electronic transport as well as education of graduate and undergraduate students. We have introduced a new computational tool to our undergraduate and graduate cirriculums, to both improve the students understanding of semiconductor devices and make the more employable by the industry. We have performed extensive community outreach through our undergraduate students mentoring high-school students, middle-school and high-school teachers and departmental open-houses. This project also served as a link between UConn and IBM, allowing our students access to state of the art facilities and a more complete education and training in the general area of electronics and nano-fabrication.
