The objective of this program is to cohesively use coarse-grained reconfigurable devices and highly-scalable non-volatile memory technologies to fundamentally improve energy efficiency in future mobile devices. The new device architecture provides the capability to dynamically exploit significant run-time computational workload variation and large algorithm design freedom inherent in most signal processing tasks, effectively enabling just-enough computation. The approach embraces the memory-intensive and time-varying nature of many signal processing tasks, which can be leveraged to reduce overall system energy consumption. In addition, these approaches make it feasible to apply aggressive run-time power management on reconfigurable architectures to minimize static energy consumption. To fully evaluate the potential of these new opportunities, a comprehensive design methodology including circuits, architectures, compiler, and run-time system is used.
Intellectual Merit: The intellectual merit of this research lies in the cohesive integration and use of a coarse-grained reconfigurable device which includes interfaces to high-density non-volatile memory technology. This interface is exploited at the system level to dynamically adapt computation-intensive signal processing applications for significant energy savings.
Broader Impacts: The broader impacts of this project are: 1) enhancement to graduate curricula in embedded systems and integrated circuit design, 2) application of the new technologies in the NSF-sponsored Engineering Research Center for Collaborative and Adaptive Sensing of the Atmosphere (CASA), 3) research infrastructure dissemination for education and training, and 4) outreach to high school students. The proposed architecture will enable future mobile devices to continue to track their historic performance and functionality scaling by supporting energy efficiency.
