The global semiconductor/electronics industry is confronting a fundamental challenge in the form of increasing power and energy consumption by the complementary-metal-oxide-semiconductor (CMOS) switches that have been the workhorse of the electronics industry for over four decades. Band-to-band tunneling field-effect transistors (TFETs) are considered the most promising post-CMOS switches, since they provide abrupt switching characteristics, and thereby enable ultra-small supply voltage and switching energy without compromising the ON-OFF switching current ratio, which is un-achievable in conventional CMOS devices. However, in spite of major efforts around the world, it has been found extremely challenging to design a working TFET using conventional bulk materials such as silicon, germanium or III-V semiconductors, due to a number of limitations including their inability to be thinned down below some critical value (that is essential for increasing the energy-efficiency of transistors designed with those materials), without loss of essential properties, as well as due to the existence of large density of interface traps arising from the inherent dangling bonds that exist at the surfaces of all such covalently bonded materials. 2-dimensional (2D) layered materials are atomically-thin and have pristine surfaces, and can therefore overcome the limitations of bulk materials. The main goal of this project is to explore the feasibility of using such 2D materials such as molybdenum disulphide, to build a TFET that can meet the performance requirements of the semiconductor industry and thereby replace the CMOS as the next-generation ultra-low power and energy-efficient electronic switch. Such a transistor can potentially revolutionize the worldwide electronics and information technology (IT) industries and bring transformative changes to computing, sensing and many other areas that affect the way we live, work and play.
Tunneling field-effect Transistors (TFETs) are considered the most promising post-CMOS switches, since they provide abrupt switching characteristics, i.e., small (<60 mV/decade at room temperature) sub-threshold swing (SS), and hence enable ultra-small supply voltage and switching energy without compromising ON-OFF current ratio, which is un-achievable in conventional CMOS devices . However, it has been found extremely challenging to recover the expected TFET performance on bulk material platform, which results from 1) inefficient gate control leading to large tunnel barrier width and low ON-current; 2) large band gap leading to high tunnel barrier and low ON-current; 3) interface trap induced leakage current leading to large SS. Utilizing the emerging 2D materials for TFET application can potentially overcome these issues, because 2D materials have 1) sizable band gap and band alignment that allow staggered- or even broken-gap type heterojunction design and lowering of tunnel barrier height, 2) ultra-thin body that provides excellent gate control and hence lowers tunnel barrier width and 3) pristine surface that greatly suppresses the trap generation. Therefore, the goal of this project is to explore (both theoretically and via experiments) 2D materials based TFETs. More specifically, we propose to employ a 2D heterostructure material platform to design and fabricate the proposed TFET device, which is radically different from all previous efforts reported in literature. This project is expected to have wide implications for the semiconductor and IT industries. Broader impact of the proposed research is also well recognized, particularly in the light of 3D integration technology now being employed worldwide, where eventual integration of ultra-low leakage and relatively temperature insensitive TFETs could be exploited to build next-generation high-performance and ultra-low power integrated circuits to support Big Data applications such as Internet of Things, social media, etc. The overall program also ties research to education at all levels.
