Wireless networks are an integral part of the information infrastructure and are more widespread than even access to electricity in some parts of the world. The primary challenge for next-generation wireless networks is data capacity. Wireless data usage is doubling every year and network providers are projecting demand approaching one gigabit per user per day. This requires a 1000x increase in network capacity and 100x increase in worst-case data rates. Since availability of spectrum is limited, the higher capacity must be achieved by sharing existing spectrum among users and improving the performance of wireless systems. However, mobile applications also require low power consumption for longer battery life. This project will investigate energy-efficient wireless circuits and systems for next-generation wireless networks that can provide gigabit per second links while operating under dense spectrum reuse. Developing such wireless systems has broad impact since improving the availability and speed of wireless links will expand existing applications as well as enable new applications that benefit economy and society. Synergy between education and research includes the creation of an inter-disciplinary course on multiple-input multiple-output (MIMO) communications. This will allow students to identify and solve high-impact cross-domain problems in wireless networks. Outreach to high school students will create opportunities for early exposure to research environments, strengthening STEM pipelines.
Next-generation wireless networks will be based on MIMO systems for increased capacity in the context of spectrum scarcity and extreme densification. This project investigates MIMO circuits and architectures to achieve interference cancellation and enable next-generation, high-capacity wireless networks. The increasing speed of CMOS transistors and near-zero incremental cost of additional transistors allow the development of novel integrated architectures that leverage multiple transmit-receive elements to achieve higher performance and interferer tolerance. Ensuring the scalability of such architectures in terms of energy-efficiency and performance is critical as next-generation networks transition to larger number of elements and higher performance. This project will also study circuits and architectures for simplifying synchronization between elements in large-scale MIMO arrays. Using multiple elements to improve transceiver frontend performance results in relaxed analog-to-digital converter requirements, thereby enabling digital-intensive architectures that further support scalability.
