9614593 Gangopadhyay mm1 This proposal presents a plan for the development of new metal to metal antifuse structures for the field programmable gate arrays (FPGAs) using a-Six,C1-x:H, a-C:H, and a-C:H,N,F dielectrics, technology of which will be transferred to Actel Corporation for process integration. Grant Opportunities for Academic Liaison with Industry (GOALI) is an appropriate program for the proposed work, because this program promotes an interdisciplinary university-industry collaboration in high-risk/high gain research areas which would not have been undertaken by industry. The applications of FPGAs are numerous. Wherever a device design uses a substantial amount of small and medium scale ICs, there exists the potential for an FPGA to provide a faster, more compact and more reliable solution. The basic antifuse is a thin insulating layer sandwiched between conductors that gets altered (programmed) by the application of a high voltage. At present, two types of antifuses are commercially produced: the n+ Si/ONO/poly Si antifuse (where ONO stands for Oxide/Nitride/Oxide) and the metal/amorphous silicon/metal antifuse. Although the applications of n+ Si/ONO/poly Si are quite promising, the ONO shows strong time dependent dielectric breakdown (TDDB) behavior. The biggest problem with a-Si antifuses is that a programmed antifuse sometimes reverts to a high impedance state, when it is stressed with a high current pulse. In collaboration with Texas Instruments, the PI has been very successful in developing amorphous carbon (a-C:H) and amorphous silicon carbide (a-SiC:H) antifuses with extremely promising properties. The metal to metal a-C:H and a-C:H,N,F antifuses showed three orders of magnitude lower leakage current, factor of two lower breakdown voltage, similar On-state resistance, and superior On-state stability compared to currently used amorphous silicon (a-Si:H) metal to metal antifuses. Actel Corporation, our industrial collaborator is extremely interested in the deve lopment of a-C:H,N,F antifuse structures at Texas Tech, which can be transferred and integrated into their 0.6 micron CMOS process within 1999 time frame. It is difficult for Actel to study such materials without the help of Texas Tech because of the constraints of limited equipment and engineering resources. We propose to change the processing conditions, such as CH4/NF3 flow rates, rf power, bias voltage, pressure and to deposit a-C:H,N,F films with various concentrations of hydrogen, nitrogen and fluorine in our PECVD system. The relationship between the antifuse characteristics and the N, F, H content of the films will be studied extensively for the optimization of the devices. We will also deposit a-SixC1-x, :H using diethysilane and methane. The most promising antifuse structures at Texas Tech will be further tested for reliability at Actel Corporation. Selected structures will be transferred to Actel Corp. for further development and inclusion into the 0.6 micron CMOS process flow. Contingent upon NSF support, Actel Corp. will provide $204,730 matching, which will include $60,000 funding and $144,730 in-kind support, including samples and sample analysis, processing, investigator time and donated equipment. Texas Tech has provided $58,200 as matching funds by granting the PI a sabbatical leave to work at Actel Corporation and by waiving the indirect cost for the $60,000 funding from Actel. *** mm1
