9722187 Sohn This award provides funds to support two research visits, for a total of nine months, by Dr. Andrew Sohn, Department of Computer and Information Science, New Jersey Institute of Technology, for collaboration with Dr. Yoshinori Yamaguchi, Computer Science Division, Electrotechnical Laboratory, Tsukuba, Japan. Their research is concerned with developing algorithms to investigate when, where, and how multithreading and multithreaded architecture can reduce communication time between parallel processors in high performance computers. To achieve their objectives, the collaborators have a technical plan consisting of the following five steps: (1) design single-threaded and multithreaded algorithms for selected benchmark problems; (2) develop data and workload distribution strategies with varying thread granularity; (3) implement the algorithms to compare the performance of three multiprocessors, the multithreaded EM-X (designed and built by the Electrotechnical Laboratory, Japan), and the single-thread IBM SP-2, and Cray T3E; (4) analyze parameters that characterize the performance of single-threaded and multithreaded machines; and (5) formulate a model to predict the performance achieved by single threading and multithreading. The principle result of this research will be a set of tools and methodologies which enable the identification of the performance of multithreading and multithreaded parallel machines against single-threaded machines. This set of tools and methodologies will help algorithm designers to convert single-threaded algorithms to a multithreaded version. The results also will help future supercomputer architects develop multithreaded machines for reducing communication time towards high performance computing. The Dr. Sohn and his Japanese collaborator are highly regarded investigators in this field of research. This project is supported under the Science Fellowship Program between the National Science Foundation and the Japan Foundation Center for Global Partnership. ***
