This Small Business Innovation Research (SBIR) Phase I project proposes to demonstrate technical feasibility of a high-speed Vertical Electro-absorptive Modulated Laser (V-EML) for high-speed interconnects. This novel technology is built on the VCSEL (Vertical Cavity Surface Emitting Laser) concept and has all of its nominal advantages such as low-power consumption, on-wafer testability, and possibility of two-dimensional arrays. This technology should eliminate the complications associated with direct modulation of the VCSEL at high speeds. Modulation will be done externally by an electro-absorptive modulator that is integrated with the VCSEL either in a hybrid fashion or monolithically. This approach allows clean modulation without overshoot at speeds higher than 10 Gbps and easily reaching 40 Gbps. Furthermore, by decoupling the modulation issues from VCSEL emission, it provides additional design freedom for achieving extra stability, lower noise and higher reliability. This concept is expected to strongly impact the chip to chip and board to board interconnect industry by virtually removing modulation speed limit and minimizing signal distortion of the optical transmitter.

Vertical laser sources in general have cost and size advantages over horizontal emitters in low to medium-power single-device applications. They also lend themselves more easily to two-dimensional array fabrication. The V-EML concept further removes the limitations of direct modulation from these devices. With external modulation, the V-EML can be driven by simpler electronics and at higher speeds. The application that this work is intended for is high-speed interconnects. This can either be in the form of backplane connections, distributed board-to-board connections or chip-to-chip optical interconnects (C2OI). VCSEL arrays known as "smart pixels" have been proposed and tested for such applications. A major impact of this technology is that it will help to remove the chip and board boundaries as significant obstacles to data transport, and will make possible truly distributed and scalable systems of the future. The high-speed interconnects optical communications market size is estimated to be more than $9 billion in 2010.

Agency
National Science Foundation (NSF)
Institute
Division of Industrial Innovation and Partnerships (IIP)
Type
Standard Grant (Standard)
Application #
0339336
Program Officer
Muralidharan S. Nair
Project Start
Project End
Budget Start
2004-01-01
Budget End
2004-06-30
Support Year
Fiscal Year
2003
Total Cost
$99,367
Indirect Cost
Name
Oepic Semiconductors, Inc
Department
Type
DUNS #
City
Sunnyvale
State
CA
Country
United States
Zip Code
94089