I/UCRC for Integrated Design-for-Reliability for Electronics (iDRE)
1160865 University of California-Riverside; Albert Wang 1160870 Vanderbilt University; Bharat Bhuva
The University of California-Riverside (UC-R) and Vanderbilt University (VU) are collaborating to establish the proposed center, with UC-R as the lead institution.
The Center for Integrated Design-for-Reliability for Electronics (iDRE) will conduct research on investigating radiation and transient electrostatic discharge (ESD) induced failures to integrated circuits (IC), multi-chip nodules (MCM) and system-in-package (SiP), and microelectronics systems; as well as developing reliability solutions by integrated designs for industrial electronics. An additional objective of the planning grant proposal is to hold a meeting with potential industrial partners to discuss the research needs for integrated design-for-reliability (DfR) and center operation mechanisms.
If successful, research activities at the iDRE Center will reveal fundamentals and mechanisms of ESD and soft error failures, as well as deliver ESD protection and soft error mitigation solutions to advanced ICs and systems. The research outcomes will cast huge impacts on modern microelectronics and system products, and will have significant benefits to the electronic industry and the nation's economy. The proposed integrated DfR reliability solutions will affect all aspects of human lives, from communications and entertainment, to information processing and storage, to life-threatening devices and mission-critical tasks, and so on. The PIs also propose a diversity plan to promote involvement of female and underrepresented minority students in engineering education and research.
This award is a small Planning Grant that allows that PI’s to hold an I/UCRC Workshop open to any potential industrial collaborators. The goals for this grant include: 1) To explore possibility of establishing a joint I/UCRC Center for Integrated Design-for-Reliability for Electronics (iDRE) to conduct collaborative research on investigating radiation and transient induced failures to integrated circuits (IC), multi-chip modules (MCM) and system-in-package (SiP), and microelectronics systems; as well as developing reliability solutions by integrated designs for industrial electronics. The proposed iDRE Center is a joint NSF I/UCRC center led by University of California, Riverside (UCR) with a sister site at Vanderbilt University. 2) To hold a planning meeting with the industrial partners to discuss the research needs for integrated design-for-reliability (DfR) and center operation mechanisms. The I/UCRC Planning Workshop was held on May 28 and 29, 2012 at University of California, Riverside. About fifty people attended the Workshop including fifteen faculty members from UCR, eight faculty members from Vanderbilt University (The sister site), about twenty industrial experts from companies such as Boeing, Qualcomm, Intel, Broadcom, Microsemi, Fairchild Semiconductor, Marvell Semiconductor, Hitachi, etc. The NSF I/UCRC Program Director and the Center Evaluator also attended the Workshop. The Workshop explained the I/UCRC Program mechanism and the goals of the proposed joint NSF Center for Integrated Design-for-Reliability for Electronics (iDRE). The participating faculty researchers from UCR and Vanderbilt University presented about twenty research projects related to electronics reliability and solutions. There was a round-table discussion where all participating industrial people provided their visions, needs and suggestions in terms of the integrated design for reliability challenges and research needed
