This AIR Technology Translation project focuses on translating manycore compiler technology to fill the designer productivity and manycore usage efficiency gap.

There is a wide consensus among computer architects that existing multicore processor designs do not scale due to the complexity of memory hierarchy. As a result memory hierarchies in manycore architectures are expected to be simpler ? with the onus of memory management now in software. However, doing that is extremely complicated for the programmer. The proposed manycore compiler technology alleviates this programmer difficulty. It automatically inserts data management instructions in the application and enables their efficient execution on manycore processors.

The translated technology has the following unique features: push-button compilation and automatic yet efficient data management that provides exemplary improvements in software development time and cost for near future manycore processors. In addition, it will also result in improved performance, and lower power consumption of the application executing on the manycore processor.

The project accomplishes this goal by developing a LLVM based compiler that will analyze the application and insert data management instructions in the program, so that the applications execute correctly and efficiently, resulting in a prototype compiler that will enable the execution of existing applications on manycore processors. While there are compiler techniques that solve a part of the problem, but our compiler not only outperforms them [see the results in our recent publications], but provides a holistic solution to the manycore programming challenge.

The partnership engages Intel (a manycore processor development company) and Raytheon Missile Systems (a manycore software development company) to provide guidance in the manycore processor and software marketplace and other aspects, including financing and commercialization as they pertain to the potential to translate the technology along a path that may result in a competitive commercial reality.

The potential economic impact of our manycore compiler technology is expected to be very significant, as this compiler technology will be needed by companies that want to use manycore processing for high performance and low power. For example, 3D tomography, high capacity 3D printers, ultra high definition 3D TVs, automatic target recognition and collision avoidance at supersonic speeds, etc., all need highest levels of performance, under strict power constraints. The power and performance needs of these applications can only be met by manycore processors, but manycore processors are not expected to have the support for memory management in hardware. Therefore existing applications will not execute on them. Our compiler will enable the execution of these applications, and therefore utilize the power and performance of latest manycore processors. This edge can greatly contribute to the U.S. competitiveness in information technology, defense systems, and consumer electronic market space.

The societal impact, in the long term, will be that the end user will receive high performance, yet power-efficient computing products at reasonable costs. This improves affordability of computing products that we need for everyday living, defense, services, healthcare etc., and elevates standard of living, especially for the economically disadvantaged.

Agency
National Science Foundation (NSF)
Institute
Division of Industrial Innovation and Partnerships (IIP)
Type
Standard Grant (Standard)
Application #
1343436
Program Officer
Barbara H. Kenny
Project Start
Project End
Budget Start
2013-09-15
Budget End
2016-02-29
Support Year
Fiscal Year
2013
Total Cost
$162,000
Indirect Cost
Name
Arizona State University
Department
Type
DUNS #
City
Tempe
State
AZ
Country
United States
Zip Code
85281