9361716 Jasinski Single crystal silicon wafers are essential for integrated circuit (IC) manufacturing. Our research proposes to fabricate these wafers directly in sheet form in contrast to cylindrical boules currently utilized. The proposed technique will reduce complexity and cost of the crystal growth hardware. Wafer slicing from the boule is eliminated along with the associated kerf loss. And, fabrication in sheet form alters the basic thermal transport of the crystal growth so that scale-up to larger sizes can be more straightforwardly accomplished. Our research objective is to obtain a final wafer product which is equal or superior to current wafers. The Phase I research will demonstrate that single crystal silicon can be fabricated in sheet form. Phase 11 will demonstrate scale-up to larger sheet widths through the construction of laboratory prototype hardware and production of high quality single crystal product. There currently is no domestic vendor of silicon wafers to supply the domestic IC fabrication industries. This puts the US IC industry at severe jeopardy vis-a- vis export control from foreign suppliers. SEMATECH has recognized this risk and has recently included bulk silicon growth within their scope of activities. This research would promote the return of silicon wafer manufacturing to the domestic United States marketplace. ***
