This Small Business Innovation Research Phase I project will demonstrate the feasibility of a Giant Magnetoresistance Ratio (GMR) tunneling transistor. GMR tunneling devices can potentially have a room temperature magnetoresistance of 50% (many times the magnetoresistance of simple two-layer magnetic sandwiches) with a high impedance and high areal density, and can operate with small magnetic fields (one Oe). These devices can be configured for memory, field sensors, magnetic amplifiers, and magnetic logic, which can, in turn, miniaturize electronics and greatly reduce power consumption for a wide variety of applications. The fundamental GMR tunneling device consists of two ferromagnetic films separated by a very thin ((20 () insulating layer. The tunneling current depends on the relative magnetic states of the magnetic layers in a fashion similar to that indicated by recent work on GMR materials. For the tunneling transistor, an additional metal line is used to produce the magnetic field required to modulate the magnetic states of the two magnetic layers. Characterization of device current with respect to applied voltage, material properties and film thicknesses, and magnetic states will be used to refine an existing model. The tunneling transistor will be breadboarded to illustrate memory operation, magnetic field sensing, magnetic amplification, and magnetic logic.
