This research is directed toward the problem of extracting three- dimensional circuit models from microcircuit and packaging layout descriptions by using the newly developed Asymptotic Waveform Evaluation (AWE) technique to develop interconnect models in an efficient manner. Several features of AWE make this approach attractive: a large speed-up over traditional interconnect extraction and simulation methods; the ability to perform efficient time-domain sensitivity analysis; the capability to handle distributed elements without making a lumped model; an efficient strategy for building macromodels of linear interconnect; and the ease with which three-dimensional electromagnetic problems (involving distributed resistance, capacitance, inductance, as well as retardation effects) can be handled. AWE sensitivity analysis helps to identify "critical" nets which must be extracted with detailed models; this should improve efficiency by allowing the remaining nets to be treated more simply. The first task in this work is the efficient simulation of nonlinear circuits which contain high-speed interconnect by development of a simulation strategy which combines the benefits of AWE for the linear portion of the circuit (interconnect) with the generality of existing simulation algorithms for the nonlinear circuit elements (such as transistors). The second task is the efficient extraction of accurate circuit models from three- dimensional interconnect geometry. This is done in such a way that the subsequent circuit simulation remains efficient. Greater simulation efficiency is achieved by eliminating the detailed interconnect models and replacing them by macromodels.
