A novel parallel computer architecture for speeding up large-scale discrete event simulation problems is investigated. In contrast to existing machines that require the programmer or compiler to perform data dependence analysis at compile time, the VIRTUAL TIME MACHINE (VTM) performs this task at runtime. In particular, the VTM hardware automatically detects and recovers from violations of data independence constraints as they occur. A sophisticated memory system that is addressed using both a spatial and a temporal coordinate is used to efficiently implement this mechanism. Dynamic load balancing/scheduling policies are used to minimize the frequency of dependency errors.
