To design a high-performance, fine-grain parallel architecture, three main problems must be addressed. They are: (i) the provision of an appropriate operation issuing mechanism, (ii) the provision of an adequate resource architecture and (iii) the provision of an adequate memory architecture. The solutions to each of these problems is heavily influenced by the nature of parallelism that exists in application programs. In this research, these problems are investigated, and solutions are developed and evaluated. The major difference between the effort and previous efforts will be the focus on exposing, rather than hiding, data dependencies.
