The growth in size and complexity of modern computers is matched by the need for more accurate models of their internal wiring structure. The task of modeling this complexity is ideally suited to a recent development in statistical physics called the re- normalization group. It has the power to attack the wiring optimization problem because it takes this one very difficult problem and breaks it up into a very large number of much simpler problems. Rather than attempting to attack the entire range of partitioning and placement requirements from the transistor level to the back-plane, an optimization procedure need only be found for a highly restricted wire length range. Once this has been derived, the procedure is renormalized for all other length scales in a manner which generates a system-wide solution. This project will investigate how such an approach may be used to develop much better estimates of interconnect-limited system performance and how this theory leads to new optimization algorithms. In contrast to other theories the predictions made by this technique will grow ever more accurate as the systems grow larger and more complex.
