The performance of an integrated circuit depends on the designers' choices and the process engineers' decisions during the manufacture of the device. Typically the choices and decisions are independent of each other with little awareness of the interplay of the two engineering domains. This research develops methods for raising the designers' awareness of the effects of circuit implementation parameters and to sensitize process engineers to the impact of processing decisions on the performance of the final circuit. A statistical model is developed to correlate device and process parameters, primarily to establish circuit performance variations on spatial and process dependencies in replicated circuits. Circuit simulators are used to solve the resultant (huge) set of nollinear differential equations. JUSTIFICATION
