9322830 Hopp The objective of this research work is to develop new generation design tools for semiconductor fabrication facilities. The research involves the use of recent results in queuing network approximations and the extensions of already developed models. The research is targeted toward the development of design tools that can produce an integrated logistics/economics analysis techniques for improving existing designs and producing near optimal design from scratch. The research result will be used to construct a workable prototype design tool that will be linked to an industrial equipment data base and tested in actual fabrication design processes of a semi-conductor fabricator. This research is well focused and very likely to result in a product that has immediate industry application. The problem addressed is real and likely to have some lasting impact on engineering infrastructure. The outcome of this research, if successfully accomplished, can lead to improved design of wafer fabrication facilities and their operation. The active support given to this research by wafer fabrication companies is a strong evidence of how the work is viewed by the target industry.
