The forthcoming post-Moore computing era speaks to a time in the near future when Gordon Moore?s Law of easy and cost-effective transistor scaling will end, and computers will no longer be faster just because they can incorporate more, smaller transistors. Future computers need to be specialized for certain tasks and designed differently to achieve the consistent gains in performance that drive our modern economy. Some possible examples of these specialized computer architectures include unique or ?rogue? designs like neuromorphic or brain-inspired computers, computers that operate at a quantum scale, and reversible computers.

This project provides the first publicly available testbed for investigating these novel post-Moore computer designs, or ?rogues,? as part of the Rogues Gallery testbed. The Rogues Gallery provides a unique research infrastructure with neuromorphic, reconfigurable, and near-memory platforms as well as capabilities for novel networking, including 5G. Additionally, the testbed is supplemented by training resources, software and tools, and a collaborative community to assist researchers and developers in the best ways to use these novel computer designs for everyday applications as well as challenging research problems. The expected outcomes of this testbed effort include a better understanding of specialized computer designs for post-Moore systems as well as improved capabilities and training for the next generation of US researchers in how to use these critical technologies.

This project develops a next-generation, community-focused hardware and software testbed and associated hardware design facility to evaluate possible architecture directions for post-Moore computing. These computer architectures and systems differ significantly from today?s standard processor models and in many cases can be considered ?rogue? approaches to the future of computing. The infrastructure, or the Rogues Gallery, will provide a community-accessible hardware testbed hosted by Georgia Tech that will enable related research into software tools and programming interfaces, data management techniques for large data sets, and algorithmic strategies for post-Moore hardware. This collaborative, community testbed represents a future-looking investment that is not currently satisfied by any existing academic or industry resources. The community need for a testbed for near-memory, neuromorphic, and next-generation networking devices has already been demonstrated by IEEE?s Rebooting Computing efforts; the rapid growth of conferences and venues for areas like thermodynamic, neuromorphic, and quantum computing; and a growing interest in researchers looking to map applications like deep learning and data analytics to these architectures.

To further develop this testbed as a community resource, the investigators are working to acquire unique hardware (rogues) and are building a common infrastructure to host this hardware and future prototypes, while also developing tutorials and training, access management, integration, and measurement techniques for post-Moore hardware and software research. The deployment and success of the Rogues Gallery infrastructure will create a new testbed and associated research community that is focused on future hardware prototypes that are not served by existing cloud, academic, national lab, or NSF resources.

This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

Agency
National Science Foundation (NSF)
Institute
Division of Computer and Network Systems (CNS)
Type
Standard Grant (Standard)
Application #
2016701
Program Officer
Yuanyuan Yang
Project Start
Project End
Budget Start
2020-09-01
Budget End
2023-08-31
Support Year
Fiscal Year
2020
Total Cost
$1,351,699
Indirect Cost
Name
Georgia Tech Research Corporation
Department
Type
DUNS #
City
Atlanta
State
GA
Country
United States
Zip Code
30332