Emerging ubiquitous computing systems require numerous small wireless nodes to be integrated into our surroundings. In order to provide both a small size and a long lifetime on limited energy, these nodes must use circuits that are ultra low power (ULP), offer substantial processing capabilities, provide flexibility to meet different application needs, and allow for low development and deployment costs. Existing approaches to circuit design such as ASICs, off the shelf parts, or sub-threshold processors fail to provide all of these traits at once. This project is developing an energy efficient field programmable gate array (FPGA) capable of operating into the sub-threshold voltage region to provide a computational platform that meets the needs of ubiquitous computing systems. Commercial FPGAs are usually designed to compete with high performance processors, so they operate at high voltages and use circuit structures that do not permit low voltage sub-threshold operation. To re-target FPGAs for energy efficient operation at low voltage, this project replaces conventional programmable interconnect circuits with non-buffered single pass-transistor switches. These switches create a voltage drop in the interconnect lines that is recovered using asynchronous sense amplifiers at the inputs to configurable logic blocks. Furthermore, the voltage of the configuration bit cells that turn on the interconnect switches is boosted. This new knob increases the speed exponentially and reduces variations in the sub-threshold region and does not incur substantial energy overhead since the configuration bit cells only switch rarely when the FPGA is reprogrammed. The configurable logic blocks are re-designed to take advantage of this new interconnect fabric.

This project will result in an FPGA capable of energy efficient low voltage operation. The FPGA device will be demonstrated in ubiquitous computing applications. Since it is both low energy and reconfigurable, it will allowubiquitous computing nodes to employ substantial processing to extract information from locally sensed data and then make decisions based on that information, reducing use of power intensive radio communication to extend the node lifetimes. The flexibility of the FPGA allows rapid re-targeting of the energy efficient hardware for different application or contextual requirements, providing a new computing platform to enhance the ability of software and hardware developers to create ubiquitous computing systems.

Project Start
Project End
Budget Start
2011-09-01
Budget End
2014-08-31
Support Year
Fiscal Year
2011
Total Cost
$400,000
Indirect Cost
Name
University of Virginia
Department
Type
DUNS #
City
Charlottesville
State
VA
Country
United States
Zip Code
22904