Modern information processing circuits found in devices such as cell phones and laptop computers run a fixed speed, known as a clock speed. As clock speeds increase, more data can be processed in a shorter time allowing for intensive applications such as streaming video and audio to be used. As clock speeds increase, the amount of power required to run the circuits also increases. A new approach would require no clock signal at all. In this approach, called asynchronous processing, data would be processed as soon as it is available. Asynchronous circuits can provide very fast data processing capabilities while also reducing the amount of power consumed. Another advantage is that recently methods have been devised that monitor signals radiated from clocked circuits that can allow thieves to obtain copies of the data being processed. Asynchronous circuits make this form of data theft much harder and are therefore more secure circuits. Unfortunately, the methods used to design asynchronous circuits are very immature and several important research problems must be solved to enable this technology to become widely used. This project has proposed solutions to these problems and the research will allow asynchronous design methods to be more fully developed and will ultimately enable asynchronous circuits to be commonly used.
The impact of having asynchronous data processing circuits in devices such as notebook computers and cell phones is that these devices will consume less power allowing them to operate much longer before recharging their batteries. For some applications, the performance of asynchronous circuits will increase since processing will occur on the data as soon as it is available. In contrast, a clocked circuit must wait until the next clock cycle before further data processing can occur. Finally, asynchronous circuits offer more security against certain data stealing attacks known as "side channel" attacks. This will prevent data thieves from accessing your data by listening to the signals emanating from
The vast majority of modern digital circuitry present in the integrated circuits used in computers and other devices utilize a synchronous periodic pulse train signal, commonly referred to as the "clock" signal, to synchronize the operation of all internal subcircuits. The synchronizing clock signal causes power to be dissipated for each voltage change and it limits the overall operating speed of the integrated circuit based on the clock signal frequency. The alternative is to design asynchronous digital circuits that operate based on the availability of data rather than a clock edge. The idea of asynchronous circuitry is not new and has found limited use in the past. One of the chief reasons asynchronous circuitry is not in widespread usage is due to the difficulty of design as compared with the automated design tools that support common synchronous circuitry. This research project investigated the possibility of developing an automated design tool for a type of asynchronous circuitry known as "Null Convention Logic" (NCL). The existence of such an automated tool allows designers to more easily produce asynchronous designs that yield lower power consumption and enhanced performance. The project investiagted several different algorithms for an NCL asynchronous design tool and a prototype tool called "UNCLE" was enhanced with some of these investigated algorithms. The algorithms were incorporated into UNCLE and prototype software was produced. Several example circuits were designed with the UNCLE tool to evaluate performance.
