Effective use of quantitative information from manufacturing processes of integrated-circuits (IC) is crucial in monitoring process potentials, identifying optimal settings, and improving the quality in general. Although process yield is the primary concern in the IC manufacturing industry, spatial dependence among chips on a wafer provides an opportunity to learn more about the process. Design of experiments has been proven to be effective for examining numerous factors simultaneously in industrial processes. The major objective of this project is to investigate the impact of factorial experiments on both yield and spatial dependence, especially when the outcome of each chip is coded as either good or bad in routine testing. This project will begin by studying log-linear models that are successfully implemented in the social sciences and biomedical research. This class of models will be adapted to incorporate both yield effects and spatial effects under factorial experimentation (more recently referred to as Taguchi experiments). Proper use of this model provides an opportunity to better understand the IC manufacturing process. In addition to incorporating design of experiments for quality improvement in IC manufacturing, the approach will be compared with some existing techniques in yield modeling.
