The objective of this research program is to develop algorithms and architectures, and fabricate and demonstrate a rugged, compact, modular, versatile, opt electronic, integrated-circuit (OEIC) neural network and fuzzy logic coprocessor system that would work in conjunction with the standard PC microprocessor. This OEIC co-processor will perform sophisticated parallel and/or fuzzy processing operations more efficiently than the standard PC microprocessor. The proposed OElC co-processor will be about the size of a CD-ROM drive, and thus would fit easily inside the case of a conventional personal computer. Another important goal of the program is that this compact OEIC co-processor be amenable to mass manufacturing.

To demonstrate the feasibility of the co-processor, the proposed hardware development tasks include: (I) design, fabrication and characterization of novel 2-D arrays of GaAs-SOS (silicon-on sapphire) OEIC cascadable smart pixels with a detector, integrated-circuit logic and a light source in each pixel (resonant cavity light-emitting diodes (RCLEDs) in the first two years of the program, and vertical-cavity surface-emitting lasers (VCSELs) replacing the RCLEDs in the third year), (2) design, fabrication and characterization of novel reconfigurable optical interconnection elements based on arrays of Bragg-holographic phase gratings, (3) aligning (with the help of a mask aligner) and gluing all the components of the co-processor (OEICs. interconnection elements, and output photodetector array) together into a rugged, compact, modular multi-layer sandwich configuration so as to permanently solve any micro-optics alignment problems, and (4) characterizing the resulting high-speed, multilayer optoelectronic co-processor. The early focus of the program will be on neural network configurations. So in addition to the above-mentioned fabrication tasks, the PI will also carry' out the following theoretical, modeling and simulation tasks: (a) develop algorithms, especially those suitable for programmable nearest-neighbor interconnections (e.g. pulse-coupled networks) to solve a large class of multi-dimensional information processing problems, and (b) explore the application of these novel co-processors to three different types of problems: (i) associative-memory-based pattern recognition, (ii) medical image segmentation and (iii) fusion of a set of low-contrast spectro-polarimetric infrared images into a single high-contrast image.

Agency
National Science Foundation (NSF)
Institute
Division of Electrical, Communications and Cyber Systems (ECCS)
Application #
0202487
Program Officer
Paul Werbos
Project Start
Project End
Budget Start
2002-10-01
Budget End
2007-09-30
Support Year
Fiscal Year
2002
Total Cost
$470,993
Indirect Cost
Name
Massachusetts Institute of Technology
Department
Type
DUNS #
City
Cambridge
State
MA
Country
United States
Zip Code
02139