As the scaling of CMOS nears its end it becomes imperative to a device paradigm that can carry forward device integration to ever-higher densities. The most daunting challenge facing the industry in the scaling of CMOS is power density. This is seen in the rapid increase in the total power dissipated by ICs, and even more ominously in the power per unit area. An attractive route to continue progress in devices is to develop a paradigm where the energy required is orders of magnitude lower than that possible in CMOS. A nanoelectronics paradigm called quantum-dot cellular automata (QCA) holds this promise, where by using quasi-adiabatic clocking the switching energy can be below kT. In addition clocked QCA cells can provide true power gain for logic level restoration. While nanoelectronics is perhaps the key technology for the future of electronics, it should be recognized that CMOS will have a place in systems long after the end of scaling, and implementations of nanoelectronics will necessarily need to interface with CMOS. CMOS has a tremendous number of advantages which can exploited, and the extensive CMOS infrastructure should be leveraged to make the smoothest possible transition to the nanoelectronic paradigm. For example, clocking and interfacing to the outside world would be handled by CMOS circuitry, while computation tasks would be handled by the low-power nanoelectronic circuitry. Combinations of nanoelectronics and CMOS will be an excellent way to implement electronic systems. The proposed project will explore the issues of interfacing nanoelectronics and CMOS.
