The proposed phase 1 effort is to investigate the implementation of a general-purpose single-chip constant fraction discriminator and single-chip or minimal-chip-set time-to-digital converter using advanced semicustom integrated-circuit technology. The goal of these new implementations is to achieve more cost-effective, more compact, more reliable, and better performing constant-fraction discriminator and time-to-digital converter functions compared to existing discrete designs. The investigation will include mapping the desired circuit functions into existing semicustom integrated- circuit offerings and then comparing these implementations with existing discrete implementations. The feasibility of proceeding on to design and manufacture these new implementations will then be evaluated.
