Conventional computer architecture has been based on and dominated by the capacity poor systems we were forced to build 20 and 50 years ago. For over three decades, the Instruction Set Architecture (ISA) has formed the basic architectural abstraction for scalability. As wonderful as the ISA abstraction has been, its range of utility is coming to an end. Our systems have grown orders of magnitude in size and speed, and many of the simplifying assumptions which underly the ISA are limiting forward scalability rather than enabling them. This effort explores a reformulation of our basic assumptions and machine abstractions to accommodate the large capacity computing systems we can now build. Whereas the sequence of primitive instructions was the core fixed point in ISA model, this effort proposes stream-connected graphs as the model fixed point for these Decentralized Streaming Architectures (DSA). This way communication is abstracted directly in the architecture facilitating parallelism and optimization for physical locality. DSA will give us a single, unifying system model for future computing systems which scales from modest, single-chip, single-processor systems, to multiprocessor ICs, to a wide range of heterogeneous System-on-a-Chip designs, to large-scale, heterogeneous, multi-component systems that evolve over decade long lifecycles.
