Reconfigurable computing exploits the ability of hardware to adapt its structure and function to suit a given problem. Theoretical models have established its power and versatility, and commercially available devices have exploited reconfiguration in solutions to a variety of problems, yet a significant gap exists between theory and practice. Theoretical models make assumptions that are unlikely to be realizable. Practical solutions are often tied to device-specific features, solving the given problem, but offering little beyond that in developing broad techniques. This project seeks to bridge this gap by tethering theory in reality, while abstracting solutions from device details.
We approach the task of bridging the gap between theory and practice from two directions: (1) theoretical models (primarily the R-Mesh) and (2) commercially available hardware (primarily FPGAs). The first direction will realistically account for practical considerations (like bus delay and power consumption), while exploiting the power of reconfiguration. The second direction will construct problem solutions (in areas like image processing and networking) on practical hardware with an aim of extracting and applying general principles. We expect these directions to open the door to hybrid architectures that seek to build on the strengths of the two platforms and fill each other's deficiencies.
