Power-aware computing has become a significant area of research and development both in industry and academia. Various techniques for reducing the energy consumption have been developed. The techniques developed for achieving the reduced power and energy cover many phases of the computer system design including circuits, voltage scaling, micro-architectures, operating systems, and compilers.
The current curriculum and the available textbooks for the relevant computer engineering courses do not adequately address power-aware computing. Our overall aim is to incorporate power-aware techniques into both the graduate and undergraduate curricula. Funds derived from this project will be used to develop a proof-of-concept in this regard.
The proof-of-concept will consist of developing instructional modules covering the following topics: (i) Power simulators, (ii) Static and Dynamic sources of power consumption, (iii) Fetch throttling as a means of reducing power consumption in high-end processors, and (iv) Voltage-scaling techniques in real-time systems. We will develop detailed plans for a two-course sequence in power-aware computing. This course sequence will be suitable for students who have had some prior exposure to computer architecture, operating systems, and compilers. It will include special-purpose applications such as embedded systems. Finally, we will develop in detail, an evaluation framework by which the quality of our offerings can be measured and improved.
