This project addresses the growing gap between nominal and exceptional peak operating conditions in modern microprocessor designs with particular emphasis on thermal and power delivery systems. In this project, we will develop and evaluate an adaptive, multi-disciplinary approach to the problem. We propose to characterize the prevalence of voltage and thermal emergency conditions and explore methods to sense and detect these emergencies at runtime. We also propose to develop flexible and extensible architectural interfaces to pass alarm information to a novel binary translation layer, where the alarm information is processed and the execution stream modified to avoid recurrences of the original emergencies.
This project seeks to address a key problem in the design of future computer systems; particularly in application domains where energy efficiency and the ratio of price-to-performance are more important design principles than peak performance. The proposed project aims to realign the design of microprocessors given this emerging trend and allow a greater number of applications in high-volume web services like web searches, computational genomics/biology, and massively multi-player role-playing games (e.g., military simulations) to achieve substantial price/performance gains.
