Modern integrated circuits (IC) contain tens of millions of transistors. Traditional design of these integrated circuits has relied on the fact that these transistors have almost identical characteristics when they are initially made, and that the characteristics change little during their subsequent usage. Therefore, IC designers have worried about other things like the size of the IC, its speed, battery life, ease of debugging for errors, etc. And this traditional design approach has worked fine for last 25 years. But now-a-days the transistors are becoming so tiny that it is getting impossible to ensure that they have same geometrical and physical characteristics. Equally important, the characteristics of the small transistors can change rapidly when the consumer uses the product. ThePIs hope to answer the question as to how one can design an integrated circuit if one can no longer rely on the uniformity of the transistors, but must account for the fact that each transistor is slightly different and that its property changes with time. One can always assume the very worst case and design for the slowest transistor, but clearly that would be very wasteful. The project are proposes that a much better approach would be to first accurately understand why and how the transistor parameter change (of fluctuate) and to account for this variation explicitly from the very beginning of the IC design process. The design technique is no longer deterministic as it once were, but it now involves statistical design methodologies like making the slower transistors a little wider (transistor sizing) to compensate for their lack of speed or making sure that the architecture distributes the usage burden among a number of transistors so no one transistor becomes so slow that the IC fails. This new approach may allow one to make faster or less power-consuming ICs with a given set of transistors, because designers can now be more aggressive in their design. This in turn, may also allow more time to find alternatives to CMOS, and ease the eventual transition to post-CMOS devices and systems.
