Quilt Packaging: A New Paradigm for the Integration of Heterogeneous Communications Systems-in-Package

Chip-to-chip communications is a bottleneck for integrated systems throughput. Several companies have developed their own technology for increasing the signal bandwidth between ICs, including IBM, Sun Microsystems, and SiliconPipe. The PIs paln to developed a unique method of interconnecting ICs that will result in several important benefits compared with those under development by industry.

The approach is a micromachining technique resulting in hundreds or thousands of small metal nodules that protrude out from the sides of IC die, allowing ICs to be connected (soldered or welded) together to form a "quilt" of die, such that signals traverse between the ICs at very high speeds and with negligible power dissipation. The technique has been called Quilt Packaging (QP) in the proposal.

Besides the increase in speed and performance (predicted to be at least 150 GHz), power dissipation of systems can be reduced by eliminating most of the high-power pad drivers currently in use in ICs. This same reduction in circuitry will decrease the chip real-estate, resulting in lower-cost ICs and higher yields. Additionally, since several QP-connected ICs will reside in one package, the total number of IC packages will be reduced resulting in lower system cost, smaller size, and lower weight. These attributes may have an important impact on military, space, and commercial hand-held systems. One more important feature of Quilt Packaging is the use of heterogeneous materials as panels in the quilt. This may lead to entirely new systems-in-package for optical, RF, or digital communications applications. Additionally, new architectures not possible prior to the advent of Quilt Packaging will be made possible.

The PIs have already demonstrated a simple QP process, and have made die with protruding nodules. They are currently in the process of designing microwave test beds to demonstrate the predicted high-frequency characteristics. This proposal requests funds to make further advances in the process, perform advanced high-frequency measurements, and demonstrate real silicon ICs with quarter-micron ring oscillators that incorporate QP nodules such that the signals jump between two connected ICs between each stage.

Project Start
Project End
Budget Start
2005-07-01
Budget End
2007-06-30
Support Year
Fiscal Year
2005
Total Cost
$275,822
Indirect Cost
Name
University of Notre Dame
Department
Type
DUNS #
City
Notre Dame
State
IN
Country
United States
Zip Code
46556