The work addresses the statistical underpinnings of sampling-based simulation of computer architectures, with the aim of providing quantitative measures of confidence of simulation data. Sampling techniques can speed up simulation but are complicated by the need to recreate the execution context to ensure validity. This project will: investigate the sources of error using known sampling error characterizations, study proper sample design for various system features, determine effective techniques when program state has unknown distributions, and characterize existing current-state estimation techniques and develop new approaches.
