CAREER: Hierarchical Process Variability Analysis of Analog Circutis Geared for Test and Diganosis
Electronic systems are proliferating into the fabric of the society with an ever increasing speed. Even before one new device technology goes into mass manufacturing, scientists start working on next generation technologies. Unfortunately, the ability to control the processing environment nears its natural limits. One direct result of this diminishing process control capability is the increasing variability in component parameters. The performance of analog electronic circuits is especially susceptible to such process variations. As the control over the process diminishes, testing the manufactured parts effectively and efficiently becomes increasingly more important. The testing process becomes all the more essential to ensure product quality and eventual success of the products in the global marketplace. The conflict resulting from the push towards higher performance while the process variability is increasing indicates a dire need for new approaches for the test automation of analog circuits that will be eventually adopted by the industry. The goal of this project is to develop hierarchical methods for process variability analysis that are geared towards test and diagnosis automation. By determining the variance of each intermediate parameter for the fault-free circuit and for many distinct faults, efficient fault-based test and diagnosis approaches can be developed. During fault injection, only a subset of the system building blocks will change. Through the hierarchical analysis approach, the changes in the circuit will prompt reprocessing of only the information that needs to be updated to ensure efficiency. While digital fault-based test and diagnosis methods have enjoyed widespread acceptance from the industry, there has been a resistance in the analog domain mostly due to the discrepancy between the design goals and the definition of what constitutes a fault. With the help of efficient process variability analysis, this project aims at breaking through this barrier by disassociating the fault injection from the pass/fail criteria. Aligning the pass/fail criteria with the specifications of the circuit will initiate a wider acceptance of automated fault-based test and diagnosis in the analog domain.
