The bulk of computing today, measured by CPUs, operations, or dollars, is embedded and deals with processing of real-world or ?media? data. Today, most compute-intensive embedded media processing is performed by hard-wired, fixed-function chips (application-specific integrated circuits or ASICs), not by programmable processors. Cell phone modems, WiFi, WiMax, and UWB modems, video codecs, digital television de-interlacers and scalers, for example, are all implemented as hard-wired fixed-function blocks. Designers choose ASICs to implement these functions today for efficiency. The power efficiency (Ops/W) and the area efficiency (Ops/mm2 ) of an ASIC is one to two orders of magnitude more efficient than the most efficient programmable processors available today. However, developing such ASICs is expensive and time consuming. The lack of an efficient, programmable, embedded processor inhibits the development of many embedded applications and slows the evolution of others.
This project plans to develop a an efficient, programmable, embedded processor that equals or exceeds the efficiency (Ops/W or Ops/mm2) of a conventional ASIC and is one to two orders of magnitude more efficient than conventional programmable processors. If successful, our research will also reduce the development cost and improve the efficiency of ASICs. To achieve this goal, the project will first identify the major sources of inefficiency in conventional architectures and then systematically develop new microarchitecture techniques to improve efficiency. Particular attention will be given to instruction sequencing and data movement which account for much of the inefficiency of conventional processors. Novel instruction sequencing schemes that capture critical loops in a small number of instruction registers and efficient data storage organizations based on distributed and indexable register files will be investigated. The project will also investigate compilation methods to target these novel architecture elements.
The development of an efficient, programmable architecture will open the door to rapid development, evaluation, and deployment of a wide variety of embedded applications with performance levels not previously possible. Research on algorithms for modems, data compression, beamforming, image understanding, and sensor networks, for example will be transformed by the availability of a programmable platform orders of magnitude more efficient than conventional processors. The availablility of this architecture will also make highly-efficient embedded systems available for niche applications (e.g, scientific instrumentation) that could not previously justify the high non-recurring costs of ASICs.
