The CORAM (Connected-RAM) project endeavors to completely rethink the reconfigurable computing fabric from scratch to create a new generation of FPGAs as first-class computing devices. From a computing perspective, a major deficiency in today?s FPGAs is the lack of a native memory architecture. The goal of the CORAM project is to develop a consistent and hardware-friendly memory architecture for FPGAs. The CORAM project will develop (1) convenient memory interface abstractions to support the application developers in accessing on- and off-chip memory and (2) the associated mechanisms, from the architecture-level down to the circuit-level, to efficiently support those memory abstractions. The CORAM project will study the abstractions and mechanisms using a combination of FPGA-based prototypes and a test-chip prototype.
The CORAM project is motivated by the renewed interest in FPGA-based computing, driven by the need for greater computing performance and at the same time greater energy efficiency. Reconfigurable computing is one of the key technology candidates to extend the exponential performance scaling efficiently beyond the current commercial multicore processor technology horizon. The CORAM project is central to fully exploring the potential of the reconfigurable computing paradigm.
