Aggressive technology scaling has brought new challenges to the design and manufacturing of Integrated Circuits (ICs). A mounting challenge is the modeling and characterization of power consumption in face of possible operating and manufacturing variabilities. Accurate power characterization leads to extended battery life for mobile devices and to enhanced device reliability. A second challenge arises because manufacturing is increasingly outsourced to external foundries. Verifying that the manufacturer has not inserted any malware or "Trojan" circuitry that compromises the security of the final product is essential. The proposed research provides a unifying framework for these two challenges by detailed algorithmic analysis of infrared emissions from the backside of ICs. We propose techniques to convert the infrared emissions into accurate spatial and temporal power estimates, and to use the power and infrared ?fingerprints? to verify that the chip does not contain extra circuits inserted by the manufacturer, unbeknownst to the designer, that could cause a security breach. The successful completion of this project will lead to improved power modeling and characterization tools and increased confidence that there are no added malware in manufactured chips. The project will also lead to design prototypes and a large volume of valuable data and benchmarks that will be openly disseminated via NSF-funded Trust-Hub and other web-based portals.
The methods and tools will find broad usage in the industry, government, and in academia. They will also impact the daily lives by increasing the battery lifetime and by improving the system's reliability and integrity. Education plan includes research experience for undergraduates, curriculum development, integration of material into graduate courses and emphasizing entrepreneurship within education. Recruitment and development of under-represented groups of students will be targeted.
