Computing has enabled immense innovations in many fields and social life due to continued performance, power, and cost improvements enabled by technology scaling. Unfortunately, two key trends threaten performance and cost improvement of computers going into the future. First, technology scaling is at jeopardy, leading to major challenges in power consumption, reliability, and performance. Second, power and energy consumption has become a key constraint, yet existing systems are mostly designed in a one-size-fits-all way agnostic to the needs of different applications. To overcome both problems, this research investigates novel uses of heterogeneous technologies in three key components of a computing system: cores, interconnect, and memory. The approach taken is an application-driven approach that aims to seamlessly integrate heterogeneity in the three components. Major expected contributions of the research include: (1) an initial study of first-principles based and application-driven design of cores, (2) new mechanisms for enabling phase-change memory based heterogeneous main memory, (3) exploration of tradeoffs in the design of 3-dimensional optical interconnects, (4) initial exploration of the interaction of heterogeneous components in cores, interconnect, and memory.

The proposed research has the potential to transform the design and architecture of future multi-core systems, which are already a part of the entire IT sector and our daily lives. It can enable overcoming key challenges that impediment higher-performance and lower-power lower-cost computing, which has traditionally enabled new applications and discoveries. Enabling fundamentally efficient heterogeneous multi-core systems can largely reduce energy and technology-scaling costs of computing, and improve dependability and performance. Direct transfer of many ideas to industry are expected through extensive collaborations with platform and chip design industries.

Project Report

This project developed fundamental techniques to enhance the performance and efficiency of multi-core architectures, which form the basis of almost all modern computing systems used today. It examined the concept of heterogeneity in processing cores, memory and interconnect, and developed new techniques to improve the design of these components of modern computers to become higher performance and more energy efficient. Key innovative intellectual outcomes of the project include the following five new designs and methods: 1. a fundamentally new heterogeneous processing core design that greatly improves energy efficiency compared to modern processing cores (Link to paper: http://users.ece.cmu.edu/~omutlu/pub/heterogeneous-block-architecture_iccd14.pdf) 2. a new method for managing heterogeneous memory consisting of multiple technologies that greatly improves system performance and efficiency (Link to paper: http://users.ece.cmu.edu/~omutlu/pub/rowbuffer-aware-caching_iccd12.pdf) 3. a new mechanism for managing DRAM based caches that enables the effective use of heterogeneous memories in a computing system, and a heterogeneous interconnect architecture that improves both system performance and energy efficiency (Link to paper: http://users.ece.cmu.edu/~omutlu/pub/timber-fine-grained-dram-cache_ieee-cal12.pdf) 4. a new mechanism for memory control in heterogeneous computing systems that provides both high performance and high quality of service to different components while being faster and easier to implement than existing mechanisms for memory access scheduling (Link to paper: http://users.ece.cmu.edu/~omutlu/pub/staged-memory-scheduling_isca12.pdf) 5. new data mapping and buffering techniques for an emerging memory technology that improves both system performance and energy efficiency (Link to paper: http://users.ece.cmu.edu/~omutlu/pub/data-mapping-buffering-for-phase-change-memory_taco14.pdf) These results have been disseminated through journal and selective conference publications, source code releases, and talks at conferences, universities and software/hardware industrial partner sites. One of the published works received the Best Paper Award at the International Conference on Computer Design in 2012. Multiple ideas were developed and evaluated in collaboration with partners in software/hardware industry, with the goal of facilitating technology transfer to the field. At least six graduate and six undergraduate students were trained in research as part of this project. The project provided ample opportunity for undergraduate students to engage in research. Some of the trained students are now pursuing PhD degrees or working as computer architects in the technology industry. Several courses at Carnegie Mellon University benefited from the research results developed in this project. The material for all of these courses, including lecture videos, are online and open to public at the following websites: www.ece.cmu.edu/~safari/course.html www.ece.cmu.edu/~ece447/s14/doku.php?id=schedule www.ece.cmu.edu/~ece740/f13/doku.php?id=schedule www.ece.cmu.edu/~ece447/s13/doku.php?id=schedule http://users.ece.cmu.edu/~omutlu/acaces2013-memory.html The source code released to the public as part of this project is included at: www.ece.cmu.edu/~safari/tools.html Publications produced as part of this project are available at: http://users.ece.cmu.edu/~omutlu/projects.htm

Project Start
Project End
Budget Start
2011-09-01
Budget End
2014-08-31
Support Year
Fiscal Year
2011
Total Cost
$116,000
Indirect Cost
Name
Carnegie-Mellon University
Department
Type
DUNS #
City
Pittsburgh
State
PA
Country
United States
Zip Code
15213