Thin-film transistors (TFTs) are one of the most important components of macro-electronic circuits used in various flexible electronic applications such as displays, large area sensors, radio frequency identification (RFID) tags, and antennas. In this context, Carbon Nanotube Thin-Film Transistors (CN-TFTs) are very promising for enhancing performance and expanding the range of operation of many flexible-electronic applications due to several reasons. However, some critical issues need to be addressed before CN-TFTs can be made available for commercial flexible electronic use. The objectives of this research are to: (a) analyze the effects of different coatings of CN-TFT substrates and self-heating on CN-TFT performance and reliability; and (b) design and analyze energy efficient and self-healing CN-TFT circuits and establish/control the effects of statistical and morphological variability of transistors on circuit-level performance. A multi-scale modeling framework consisting of an atomistic model for Carbon Nanotube (CNT) junctions, electro-thermal transport model for CN-TFTs, and circuit models will be developed to enable this analysis. The multi-scale framework will facilitate the design of energy efficient, high performance, and reliable CN-TFT circuits and establish guidelines for significant decrease in the power consumption, hot spot temperature, and performance variations.
Efficient numerical methods developed for multi-scale electrical and thermal transport will boost the field of efficient computing and analysis of electronic devices. This program will develop education modules on power consumption, energy transport and heat dissipation in electronic devices and energy-efficient circuit design, which will enhance the undergraduate and graduate curriculum. Small demonstrations and hands-on sessions prepared by this program will motivate K-12 students for higher education.
