Modern Field Programmable Gate Arrays (FPGAs) hold great promise in leapfrogging our computing performance and energy efficiency in many important AI-driven or big data applications. However, manual FPGA programming is extremely difficult, error-prone, and hard to optimize. This project aims at developing a novel and "automatic" methodology to greatly improve the FPGA developer's productivity and the computing performance of their designs. This project, if successful, can not only achieve the high-performance of FPGA computing previously infeasible, but also significantly boost the FPGA developers' total productivity. Given the growing importance of modern FPGA technologies in our high-tech future, solving this fundamental problem is crucial to the future competitiveness of US computer industry.
The major technical aspect that this project seeks to address is how to optimally synthesize irregular yet important computation patterns because all of the most important FPGA designs typically exhibit much more general and sophisticated memory access patterns. To this end, this project has proposed several novel and fundamental graph-based optimization techniques that can not only greatly benefit FPGA technology, but also be readily extended to other computing domains, such as CPU compiler or GPU-based computing. In particular, the project uses graphs to capture memory accesses, and presents three research thrusts: (i) GraphMorph solves the problem of scheduling and binding, (ii) GraphFold maximizes conflict resolution, and (iii) GraphProjection targets high-dimensional memory spaces.
This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
