This research continues an investigation in the area of new unconventional structures for digital signal processing. Instead of a conventional analog-to-digital converter, which produces a sampled signal output, the present research considers using the output of a delta modulator. While the sample rate must be increased considerably, digital filtering can then be performed without any multiplications, which has the potential to simplify the implementation in VLSI hardware and also lower chip-area requirements. Previous work of the investigators has been concerned with FIR structures. This work is concerned with IIR filters and adaptive filters which are designed based on the new approach. The investigators are exploring the relation of their work to the sigma-delta modulator studied in A/D conversion and the variety of processor implementations that can result as the decimation rate is varied in that approach. This grant continues on-going research concerned with novel approaches to digital signal processing. The digital filters that are the concern of this research have wide application in military, consumer, and medical equipment. The filters are both fixed and adaptive and are generally used to separate out desired signals from undesired signals and noise. This research is concerned with the simplifications of the algorithmic requirements on the VLSI hardware that are possible when a novel high-speed analog sampling is performed.
