Dr. De Micheli is studying computer-aided-design (CAD) algorithms and their implementation in a design system environment. His long-term goal is a hardware synthesis system that can transform automatically a procedural description of a hardware design into a geometric description of a VLSI chip suitable for fabrication. He plans to extend previous research on logic synthesis to structural synthesis. This involves the automation of specific decisions that a hardware architect has to take in order to cast an abstract behavior of a digital system into an interconnection of units performing the given task. The main issue to be addressed here is that of architectural partitioning--deciding on tradeoffs in the coarse grain parallelism. Secondly, he will investigate circuit synthesis for fast VLSI digital computation units. He seeks specialized synthesis techniques, as well as circuit optimization methods at electrical and geometric levels of representation. The goal is to synthesize automatically circuits with minimal computation delay, given limitations of circuit area and power.
