The goal of this research is the development of an integrated set of tools for the logical and physical design of sequential circuits with reduced area and improved performance. The proposed research is developing analytical techniques for synthesis of sequential circuits by means of functional and physical decompositions so as to minimize the area and maximize the performance (or find a trade off between the two). Algorithms to decompose a sequential circuit into a set of interacting synchronous finite state machines (FSM's) are being investigated. The approach is to find a set of generalized partitions of machine states, so that each machine state can be implemented as a separate machine. The machines corresponding to those partitions interact with each other in a more complex fashion than those derived on the basis of classical theory of closed partitions. For example, in this organization one machine may depend on other machines by using their state bits as primary inputs.
