The discipline of timing management is the key to the effective design of any large scale computer systems in this era of advanced technology. It has been pointed out by Sutherland recently that the current design framework which employs a globally clocked timing discipline has reached its limit. It was demonstrated that there are many advantages if a different timing discipline, namely, the transition-signal conceptual framework is used to design complex computation systems. In this research, we take a bottom up approach to accomplish the synthesis of micropipeline processing systems from a high-level specification. The first milestone is to examine the design and building of micropipeline structures using differential CMOS logic instead of static CMOS logic. The second milestone is to implement an automatic synthesis system for a particular micropipeline stage's logic processing block given a set of logic equations. The third milestone is to implement all necessary token control circuitry. The last milestone is to map a dataflow graph which specifies a particular algorithm into hardware using the micropipeline design frame work.
