Tong A research program on the use of single stuck-at-fault test sets (SSFTS) to detect multiple faults and their combinations in CMOS VLSI circuits is being planned. Preliminary results are being simulated and extended to more complex fault conditions. Also, circuits under consideration are being expanded from combinational to sequential circuits, both synchronous and asynchronous. A fault model that permits use of both voltage and current in detecting faults is being formulated.
