Lin This project is investigating a novel parallel processing technique, shift switching, in reconfigurable bus systems. The research has four parts. The first part classifies and evaluates shift switches and their inclusion in efficient VLSI architectures. The second part develops and analyzes some efficient reconfigurable bus architectures with shift switches for such parallel computations as prefix operations, sorting, list ranking, tree search, and transitive closure. The third part investigates application-specific architectures using shift switches for computer arithmetic, image processing, and computer vision. The fourth part investigates the relation between PRAM models and reconfigurable busses with shift switching.
