Chatterjee This research concerns the development of algorithms and software tools for synthesizing signal processing and control circuits that can perform highly reliable computations under adverse conditions. This is achieved by the use of both off-line (passive) and on-line (active) method. The approach is to extract mathematical models of circuit behavior from high-level descriptions of circuits, and then operate on them with numerical algorithms. These in turn generate a group of architectural specifications that are functionally equivalent. Design optimization is achieved by transformation of the multiplier constants and restructuring of the circuit flow graphs. The optimizations are carried out so as to maintain high levels of testability and fault-tolerance without regard to cost criteria such as node activity.
