Pomeranz A method for solving CAD design and test problems, which is especially suitable for solving large problems because it does not deteriorate as circuit size is increased, is being explored. The approach is to scale down the problem while retaining all of its details; find high quality solutions for a sequence of small circuits; develop rules for solving these problems; and then scale up these miniature solutions into a solution for the large problem. Since the miniature solutions are optimal, the full- sized solutions are expected to have very high quality. Research problems being explored are: 1. test generation for various fault models on designs given at the gate and higher levels; 2. built-in-self-test methods; and 3. testing of synchronous sequential circuits that require two pattern tests.

Agency
National Science Foundation (NSF)
Institute
Division of Computer and Communication Foundations (CCF)
Application #
9357581
Program Officer
Robert B Grafton
Project Start
Project End
Budget Start
1993-09-01
Budget End
2000-02-29
Support Year
Fiscal Year
1993
Total Cost
$312,500
Indirect Cost
Name
University of Iowa
Department
Type
DUNS #
City
Iowa City
State
IA
Country
United States
Zip Code
52242