The principal goal of this project is to design error control codes for "byte-organized" systems using a new error control model. In a byte-organized system, the hardware is partitioned such that each part produced a subset of hits in the output. For example, a memory may be organized as one byte per card. In this case, each card produces a byte in the memory word. For such systems, a new error control model called the bit/byte bounded model is being developed. Briefly, this model can be described using tow parameters, say t and u. The codes designed using the bit/byte bounded model can tolerate up to t bit errors confined to a must u bytes. Unlike the existing approaches, the bit/byte bounded model can interpolate between the traditional bit and 1 byte error models. Also, the proposed model can be used to reduce the number of checkbits by trading a small amount of error control capability.
