The vast majority of serious software design flaws are due to incomplete, inconsistent, or obscure requirements documents. It is in the very first stages of software development, the requirements specification phase, that the fewest formal procedures exist to aid the analyst. Techniques to capture, verify, and validate requirements specifications for embedded systems are of demonstrable importance. This project focuses on validation of requirements specifications, specifically on executable specifications. An integrated framework is being constructed for the development, analysis, and execution of high-level requirements specifications for embedded systems. The framework is intended to support (1) execution and simulation of embedded system requirements (hardware-in- the loop simulation), and (2) requirements reuse and requirements synthesis based on the structure and design of the physical system. This environment will enable an executable high-level requirements specification to interact with: (1) models of the assumed behavior of the environment, (2) software simulations of the environment, or (3) the actual physical components in the environment. The approach taken is to extend an existing formal specification language, RSML, with the capability to define system-level inter-component communication in an embedded system. The educational component of this CAREER project seeks to increase industrial involvement in undergraduate and graduate education through case studies and industrial projects. A remotely-accessible embedded systems laboratory is being established, where students can gain realistic hands-on experience with software development for real-time systems. ***
